QSPI direct communication

  /* enable clocks to the QSPI block */
    R_MSTP->MSTPCRB_b.MSTPB6 = 0;

    /* Initialized unused bits */
    R_QSPI->SFMSPC = 0x10;
    R_QSPI->SFMCST = 0U;
    R_QSPI->SFMSIC = 0U;
    R_QSPI->SFMPMD = 0U;
    R_QSPI->SFMCNT1 = 0U;

    /* Set the SPI clock rate */
    R_QSPI->SFMSKC_b.SFMDV = BSP_PRV_QSPI_CLOCK_RATE;

    /* enter direct communication mode */
    R_QSPI->SFMCMD_b.DCOM = 1;

    /* Reset the flash device - SW command */
    bsp_qspi_device_reset();

    /* Reset takes 30uS */
    R_BSP_SoftwareDelay(35, BSP_DELAY_UNITS_MICROSECONDS);

    /* Read the ID of the device. Confirm it is the correct device. */
    R_QSPI->SFMCOM                         = QSPI_COMMAND_READ_ID;  /* Write the command */
    device_characteristics.manufacturer_id = R_QSPI->SFMCOM_b.SFMD; /* Read the manufacturer ID */
    device_characteristics.memory_type     = R_QSPI->SFMCOM_b.SFMD; /* Read the memory type */
    device_characteristics.memory_capacity = R_QSPI->SFMCOM_b.SFMD; /* Read the memory capacity */
    R_QSPI->SFMCMD_b.DCOM                  = 1;                     /* Close the SPI bus cycle */

    if ((BSP_PRV_QSPI_MANUFACTURER_ID != device_characteristics.manufacturer_id) ||
        (BSP_PRV_QSPI_MEMORY_TYPE != device_characteristics.memory_type) ||
        (BSP_PRV_QSPI_MEMORY_CAPACITY != device_characteristics.memory_capacity))
    {
        device_characteristics.manufacturer_id = 0;
        device_characteristics.memory_type     = 0;
        device_characteristics.memory_capacity = 0;
        return;
    }

    /* Read the status of the device */
    R_QSPI->SFMCOM  = QSPI_COMMAND_READ_STATUS_REGISTER_1;  /* Write the command */
    flag_status1.status    = R_QSPI->SFMCOM_b.SFMD;                /* Read the flags */
    R_QSPI->SFMCMD_b.DCOM = 1;                                    /* Close the SPI bus cycle */

    R_QSPI->SFMCOM  = QSPI_COMMAND_READ_STATUS_REGISTER_2;  /* Write the command */
    flag_status2.status    = R_QSPI->SFMCOM_b.SFMD;                /* Read the flags */
    R_QSPI->SFMCMD_b.DCOM = 1;                                    /* Close the SPI bus cycle */

    /* Set the number of dummy cycles in QSPI peripheral */
    R_QSPI->SFMSDC_b.SFMDN = BSP_PRV_QSPI_W25Q64FV_NUM_DUMMY_CLOCKS - 2;

    /* Micron QSPI needs 50ns de-select  (QSSL high between cycles) for nonREAD commands */
    /* (20ns for a read command) Need 3 and a bit clock (i.e. 4) cycles at 60MHz */
    R_QSPI->SFMSSC_b.SFMSW = BSP_PRV_QSPI_N25Q256A_DE_SELECT_DELAY;

    /* We need to set the QE bit to 1 in the W25Q64FV status register, to enable QUAD IO mode */
    /* Since the part on the S7-SK board is W25Q64FVSSIG, QE default state is 0               */
    /* Set the QE bit as a volatile write, for speed, and not to affect the write endurance of */
    /* Status Register non-volatile bits, and so the device is in the default state */
    /* at power up.  */

    /* Write Enable For Volatile Status Register */
    R_QSPI->SFMCOM  = QSPI_COMMAND_WE_FOR_VOLATILE_SR;  /* Write the command */
    R_QSPI->SFMCMD_b.DCOM = 1;

    flag_status2.qe = 1 ;                               /* set bit 2 (S9), QE = 1 */

    /* Write Status Register */
    R_QSPI->SFMCOM  = QSPI_COMMAND_WRITE_STATUS_REGISTER;  /* Write the command */
    R_QSPI->SFMCOM  = flag_status1.status;                /* Write the Status Register 1 back */
    R_QSPI->SFMCOM  = flag_status2.status;                /* Write the Status Register 2 back, set bit 2 (S9), QE = 1 */
    R_QSPI->SFMCMD_b.DCOM = 1;                              /* Close the SPI bus cycle */

    /* Disable Write */
    R_QSPI->SFMCOM  = QSPI_COMMAND_WRITE_DISABLE;           /* Write the command */
    R_QSPI->SFMCMD_b.DCOM = 1;                              /* Close the SPI bus cycle */

    /* Set the read mode */
    R_QSPI->SFMSMD_b.SFMRM = BSP_PRV_QSPI_READ_MODE;
    /* End, set QE bit 1 */

    /* Re-Read the status of the device, with updated settings */
    R_QSPI->SFMCOM  = QSPI_COMMAND_READ_STATUS_REGISTER_1;  /* Write the command */
    flag_status1.status    = R_QSPI->SFMCOM_b.SFMD;                /* Read the flags */
    R_QSPI->SFMCMD_b.DCOM = 1;                                    /* Close the SPI bus cycle */

    R_QSPI->SFMCOM  = QSPI_COMMAND_READ_STATUS_REGISTER_2;  /* Write the command */
    flag_status2.status    = R_QSPI->SFMCOM_b.SFMD;                /* Read the flags */
    R_QSPI->SFMCMD_b.DCOM = 1;                                    /* Close the SPI bus cycle */

#if   BSP_PRV_QSPI_ROM_PREFTECH_MODE
    R_QSPI->SFMSMD_b.SFMPFE = 1;
#endif

 

I have used the SK board qspi as reference.  Please let me know what could be the issue here.