I was wondering if bit shifting would work and may give it a try if all else fails.
I tried to copy and change the clk_phase as you described above but I get a SSP_ERR_HW_LOCKED response to the read operation, all spi function return successful.
volatile ssp_err_t returnVal;
spi_cfg_t spiCfg;
returnVal = g_spi0.p_api->open( g_spi0.p_ctrl, g_spi0.p_cfg );
returnVal = g_spi0.p_api->write( g_spi0.p_ctrl, spiData, spiPacketCount, SPI_BIT_WIDTH_8_BITS );
returnVal = g_spi0.p_api->close( g_spi0.p_ctrl );
memcpy( &spiCfg, g_spi0.p_cfg, sizeof( spiCfg ) );
spiCfg.clk_phase = SPI_CLK_PHASE_EDGE_ODD;
returnVal = g_spi0.p_api->open( g_spi0.p_ctrl, &spiCfg );
returnVal = g_spi0.p_api->read( g_spi0.p_ctrl, &spiData[*pRetDataCount], 1, SPI_BIT_WIDTH_8_BITS );
returnVal = g_spi0.p_api->close( g_spi0.p_ctrl );